Design Workshop Technologies - Electronic Design Automation
Design Workshop software for design of microelectronics and photonics computer components
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    HLVS Features

Feature Highlights

As is true with all dw-2000 modules, HLVS is well integrated into the dw-2000 GPE and easily customized to address a wide variety of problems. With these modules, you can easily implement extraction rules for any technology or application. Also, the HLE and LVS standard graphical interfaces maintain dw-2000's complete product "look and feel", which helps minimize the learning curve. The main features of dw-2000 HLVS are:
  • Extraction rules defined via GPE script file
  • HLE Option to generate Hierarchical or Flat Netlist (HSPICE format)
  • Parasitics extraction
  • Easy to understand mismatch report
  • Electrical view representation and navigation
  • LVS Netlist support of HSPICE, EDIF, and Verilog formats
  • Name Binding option for matching non-symmetrical cell representations
  • Matching tolerance and permutability control
  • Adaptable using GPE programming language
  • Easy-to-use graphical user interface (GUI)
  • Merging of parallel and serial devices
  • User specified threshold for parasitics